The present application claims the benefit of and priority to a pending provisional application entitled “Vertical Conduction Buck Converter Package,” Ser. No. 61/618,628 filed on Mar. 30, 2012. The disclosure in this pending provisional application is hereby incorporated fully by reference into the present application.
1. Field of the Invention
The present invention relates generally to semiconductor devices. More particularly, the present invention relates to packaging of semiconductor devices.
2. Background Art
Conventionally, power circuits such as DC-DC power conversion circuits may be implemented using separate discrete components. However, in order to optimize form factor, performance, and manufacturing cost, it is often desirable to integrate multiple components of a power circuit into a single compact package. Thus, several package designs have been developed to integrate multiple transistors, such as a control transistor and a synchronous transistor of a buck converter power phase, into a single compact package.
To provide sufficient electrical performance for the reliable operation of high power semiconductor packages, it is crucial to ensure high current carrying capacity and low resistance of the transistors within the package. Additionally, for long-term package reliability, it is essential to provide proper thermal dissipation.
It is known to use a stacked configuration to combine a control transistor and a synchronous transistor into a single high power semiconductor package. However, the stacked configuration is not ideal from a thermal management perspective, as heat from a lower transistor is emitted directly to an upper transistor stacked on top. Moreover, due to differing die sizes, electrode positions, and required die orientations of the control transistor and the synchronous transistor, various design workarounds may be required to connect the stacked package, increasing cost and complexity. Further, the stacked configuration may not provide sufficient space for a driver integrated circuit (IC).
To avoid the above connection issues, it is known to use planar or lateral structure transistors, which provide access to all electrodes on a single side of a transistor. However, planar transistors may not provide sufficient current carrying capacity for high power applications. Additionally, the use of planar transistors may undesirably increase package form factor, complexity, and cost.
Thus, a unique and cost-effective solution is needed to support the efficient design and operation of high power semiconductor packages, such as for buck converter power phases, with enhanced thermal dissipation and a compact form factor.